general description the max8556/max8557 low-dropout linear regulators operate from input voltages as low as 1.425v and are able to deliver up to 4a of continuous output current with a typical dropout voltage of only 100mv. the out- put voltage is adjustable from 0.5v to v in - 0.2v. designed with an internal p-channel mosfet pass tran- sistor, the max8556/max8557 maintain a low 800? typi- cal supply current, independent of the load current and dropout voltage. using a p-channel mosfet eliminates the need for an additional external supply or a noisy inter- nal charge pump. other features include a logic-con- trolled shutdown mode, built-in soft-start, short-circuit protection with foldback current limit, and thermal-over- load protection. the max8556 features a pok output that transitions high when the regulator output is within ?0% of its nominal output voltage. the max8557 offers a power-on reset output that transitions high 140ms after the output has achieved 90% of its nominal output voltage. the max8556/max8557 are available in a 16-pin thin qfn 5mm x 5mm package with exposed paddle. applications servers and storage devices networking base stations optical modules point-of-load supplies ate features 1.425v to 3.6v input voltage range guaranteed 4a output current 1% output accuracy over load/line/ temperature 100mv dropout at 4a load (typ) built-in soft-start 800 a (typ) operating supply current 150 a (max) shutdown supply current short-circuit current foldback protection thermal-overload protection 10% power-ok (max8556) 140ms power-on reset output (max8557) fast transient response 16-pin thin qfn (5mm x 5mm) package max8556/max8557 4a ultra-low-input-voltage ldo regulators ________________________________________________________________ maxim integrated products 1 12 11 10 9 5 6 7 ep 8 in in out out top view 16 15 14 13 en + n.c. gnd fb 1234 in in in in max8556 (max8557) pok (por) out out out thin qfn 5mm x 5mm pin configuration ordering information in en gnd out fb n.c. pok (por) v in 1.425v to 3.6v v out 0.5v to v in - 0.2v max8556 (max8557) typical operating circuit 19-3257; rev 2; 8/09 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin- package feature max8556 ete+ - 40 c to + 85 c 16 thin qfn-ep* pok m ax 8556e te /v + - 40 c to + 85 c 16 thin qfn-ep* pok max8557 ete+ - 40 c to + 85 c 16 thin qfn-ep* por + denotes a lead(pb)-free/rohs-compliant package. /v denotes an automotive qualified part. *ep = exposed pad.
max8556/max8557 4a ultra-low-input-voltage ldo regulators 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v en = v in = 1.8v, v out = 1.5v, i out = 2ma, t a = -40? to +85?, typical values are at t a = +25?, unless otherwise noted.) (note 2) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in, en, pok, por to gnd .......................................-0.3v to +4v fb, out to gnd ..........................................-0.3v to (v in + 0.3v) output short-circuit duration.....................................continuous continuous power dissipation (t a = +70?) 16-pin thin qfn (derate 33.3mw/? above +70?) (note 1)............................................2666.7mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter conditions min typ max units in input voltage range 1.425 3.600 v v in rising, 70mv hysteresis 1.30 1.35 1.40 input undervoltage lockout v in falling 1.23 1.28 1.33 v out output voltage range 0.5 3.4 v load regulation i out = 2ma to 4a 0.1 %/a line regulation v in = 1.425v to 3.6v, v out = 1.225v -0.15 0 +0.15 %/v dropout voltage v in = 1.425v, i out = 4a, v fb = 480mv 100 200 mv regulated output-voltage current limit v in = 3.6v, v out = 3v, v fb = 460mv 5 7 9 a load capacitance esr < 50ma 16 120 ? fb fb threshold accuracy (note 3) v out = 1.225v to 3v, v in = v out + 0.2v to 3.6v, i out = 2ma to 4a 495 500 505 mv fb input bias current v fb = 0.5v, v in = 3.6v 0.001 1 a gnd v in = 1.425v to 3.6v, v out = 1.225v 800 1600 gnd supply current dropout, v in = 3.6v, v fb = 480mv 1000 2000 ? gnd shutdown current v in = 3.6v, en = gnd 150 ? pok fb high 540 550 560 fb power-ok fault threshold fb moving out of regulation, v in = 1.425v to 3.6v, 10mv hysteresis fb low 440 450 460 mv pok output voltage, low v fb = 0.4v or 0.6v, i pok = 2ma 25 200 mv note 1: maximum power dissipation is obtained using jedec jesd51-5 and jesd51-7 standards.
max8556/max8557 4a ultra-low-input-voltage ldo regulators _______________________________________________________________________________________ 3 note 2: specifications to t a = -40 c are guaranteed by design and not production tested. note 3: minimum supply voltage for output accuracy must be at least 1.425v. electrical characteristics (continued) (v en = v in = 1.8v, v out = 1.5v, i out = 2ma, t a = -40? to +85?, typical values are at t a = +25?, unless otherwise noted.) (note 2) parameter conditions min typ max units pok output current, high v pok = 3.6v v fb = 0.5 0.001 1 a pok delay time from fb rising to pok high 25 50 100 ? en en rising 1.25 enable input threshold v in = 1.425v to 3.6v en falling 0.4 v enable input bias current v en = 0v or 3.6v -1 +1 ? thermal shutdown t j rising +160 thermal-shutdown threshold output on and off t j falling +115 ? por fb power-on reset fault threshold fb falling, v in = 1.425v to 3.6v, 10mv hysteresis 440 450 460 mv por output voltage, low v fb = 0.4v, i por = 2ma 25 200 mv por output current, high v por = 3.6v, v fb = 0.5v 0.001 1 a por rising delay time fb rising to por high impedance 100 140 200 ms soft-start soft-start time 100 ? typical operating characteristics (v en = v in = +1.8v, v out = +1.5v, i out = 4a, c out = 20?, c in = 20?, and t a = +25?, unless otherwise noted.) output voltage vs. input voltage max8556 toc01 input voltage (v) output voltage (v) 3.0 2.4 1.8 1.35 1.40 1.45 1.50 1.55 1.30 1.2 3.6 t a = -25 c t a = -40 c t a = -85 c i load = 2a output voltage vs. load current max8556 toc02 load current (a) output voltage (v) 3 2 1 1.4980 1.4985 1.4990 1.4995 1.5000 1.5005 1.5010 1.5015 1.5020 1.5025 1.4975 04 t a = -40 c t a = +85 c t a = +25 c gnd current vs. input voltage max8556 toc03 input voltage (v) gnd current ( a) 2.4 1.2 100 200 300 400 500 600 700 800 900 1000 0 0 3.6 i load = 4a i load = 2a i load = 0a
max8556/max8557 4a ultra-low-input-voltage ldo regulators 4 _______________________________________________________________________________________ typical operating characteristics (continued) (v en = v in = +1.8v, v out = +1.5v, i out = 4a, c out = 20?, c in = 20?, and t a = +25?, unless otherwise noted.) gnd current vs. temperature max8556 toc04 temperature ( c) gnd current ( a) 60 35 10 -15 100 200 300 400 500 600 700 800 900 0 -40 85 i load = 2a i load = 0a dropout voltage vs. load current max8556 toc05 load current (a) dropout voltage (mv) 3.5 3.0 2.0 2.5 1.0 1.5 0.5 10 20 30 40 50 60 70 80 90 0 0 4.0 v in = 1.5v line-transient response max8556 toc06 100 s/div 1.8v 10mv/div 2.5v v in v out (ac-coupled) 4a load-transient response max8556 toc07 40 s/div 2a/div 50mv/div v out (ac-coupled) i out 2a load-transient response max8556 toc08 40 s/div 1a/div 50mv/div v out (ac-coupled) i out enable waveforms max8556 toc09 100 s/div 1v/div 2v/div v en v out short-circuit waveforms max8556 toc10 200 s/div 1v/div 5a/div 2v/div v in 3.6v v out i out
max8556/max8557 4a ultra-low-input-voltage ldo regulators _______________________________________________________________________________________ 5 exposed paddle temperature vs. ambient temperature max8556 toc13 ambient temperature ( c) exposed paddle temperature ( c) 68 51 34 17 10 20 30 40 50 60 70 80 90 100 0 085 data taken using max8556 evaluation kit fb regulation vs. temperature max8556 toc14 temperature ( c) fb (v) 60 35 10 -15 0.495 0.500 0.505 0.510 0.490 -40 85 i load = 50ma foldback current-limit waveforms max8556 toc15 100 s/div 500mv/div 5a/div v out i out current-limit threshold vs. temperature max8556 toc16 temperature ( c) current-limit threshold (a) 60 35 10 -15 6.2 6.4 6.6 6.8 7.0 7.2 7.4 7.6 7.8 8.0 6.0 -40 85 psrr vs. frequency max8556 toc11 frequency (khz) psrr (db) 100 10 10 20 30 40 50 60 70 80 90 0 1 1000 v in = 2.5v i load = 1a startup waveforms max8556 toc12 100 s/div 1v/div 2v/div 2a/div v in i in v out typical operating characteristics (continued) (v en = v in = +1.8v, v out = +1.5v, i out = 4a, c out = 20?, c in = 20?, and t a = +25?, unless otherwise noted.)
max8556/max8557 4a ultra-low-input-voltage ldo regulators 6 _______________________________________________________________________________________ pin description pin name function 1? in ldo input. connect to a 1.425v to 3.6v input voltage. bypass with a 22? ceramic capacitor to gnd. 7?1 out ldo output. bypass with 2 x 10? ceramic capacitors to gnd. a smaller capacitance can be used if the maximum load current is less than 4a. pok (max8556) power-ok output. open-drain output that pulls low when v out is outside ?0% of the expected regulation voltage or when en is low. pok is high impedance when v out is within ?0% of the nominal output voltage. connect a resistor from pok to a logic supply of less than 3.6v. 12 por (max8557) power-on reset. open-drain output goes high impedance 140ms after the output is above 90% of its nominal regulation voltage. por pulls low immediately after an output fault or when en is low. connect a resistor from por to a logic supply of less than 3.6v. 13 fb feedback input. v fb is regulated to 0.5v. connect to the center tap of a resistor-divider from output to gnd to set the desired output voltage. 14 gnd ground 15 n.c. connect to gnd or leave unconnected 16 en enable input. connect to gnd or a logic low to shut down the device. connect to in or a logic high for normal operation. ep exposed paddle. connect to gnd and to a ground plane for heatsinking. p max8556 (max8557) thermal- overload protection ref shutdown logic error amp current- limit comparator threshold en gnd in 0.50v out fb pok (por) 0.45v 0.55v undervoltage lockout pok (por) circuitry n block diagram
max8556/max8557 4a ultra-low-input-voltage ldo regulators _______________________________________________________________________________________ 7 detailed description the max8556/max8557 low-dropout linear regulators are capable of delivering up to 4a from low-input volt- age supplies ranging from 1.425v to 3.6v with only 200mv of dropout (max). the pmos output stage can be driven from input voltages down to 1.425v without sacrificing stability or transient performance. supply current is not a significant function of load or input head- room because this regulator has a pmos output device. the max8556/max8557 are fully protected from an out- put short circuit by current-limiting and thermal-overload circuitry. the low-power shutdown mode reduces sup- ply current to 0.2? (typ) to maximize battery life in portable applications. the max8556 includes an open- drain power-ok signal (pok) that goes high when the regulator output is within ?0% of its nominal output voltage. the max8557 includes an open-drain power- on-reset output (por) that goes high 140ms after the output has risen above 90% of its nominal value. internal p-channel pass transistor the max8556/max8557 feature a 25m ? p-channel mosfet pass transistor. unlike similar designs using pnp pass transistors, p-channel mosfets require no base drive, which reduces quiescent current; pnp- based regulators also waste considerable current in dropout when the pass transistor saturates, and use high base-drive currents under large loads. the max8556/max8557 do not suffer from these problems and consume only 800 a (typ) of quiescent current under heavy loads, as well as in dropout. short-circuit/thermal fault protection the max8556/max8557 are fully protected from output short circuits through current-limiting and thermal-over- load circuitry. when the output is shorted to ground, the output current is foldback limited to 3a (max). under these conditions, the device quickly heats up. when the junction temperature reaches +160?, the thermal- overload circuitry turns off the output, allowing the device to cool. when the junction cools to +115?, the output turns back on and attempts to establish regula- tion. current limiting and thermal protection continue until the fault is removed. shutdown mode the max8556/max8557 feature a low-power shutdown mode that reduces quiescent current to 0.2 a (typ). drive en low to disable the voltage reference, error amplifier, gate-drive circuitry, and pass transistor, and pull the output low with 5k ? impedance. drive en high or connect to in for normal operation. power-ok output (pok, max8556 only) the max8556 features a power-ok (pok) output to indicate the status of the output. pok is high impedance when the regulator output is within ?0% of its nominal output voltage. if the output voltage falls/rises outside this range or the ic experiences thermal fault, pok is internally pulled low. this open-drain output requires an external pullup resistor to v in or another logic supply below 3.6v. for glitch immunity, an internal delay circuit prevents the output from switching for 50? (typ) after the trip threshold is initially reached. pok is low when the ic is in shutdown mode. power-on reset (por, max8557 only) the max8557 features a power-on reset output that goes high impedance 140ms (typ) after the output reaches 90% of its nominal value. this open-drain out- put requires an external pullup resistor to v in or another logic supply less than 3.6v. when the output falls below 90% of the nominal output voltage or the ic experi- ences a thermal fault, por immediately transitions low. por is low when the ic is in shutdown mode. operating region and power dissipation the maximum power dissipation depends on the ther- mal resistance of the ic package and the circuit board, the temperature difference between the die junction and ambient air, and the rate of ambient airflow. the power dissipated by the ic is p = i out x (v in - v out ). proper pcb layout can increase the allowed power dissipation by dissipating heat in the board instead of the package. see the thermal considerations in pcb layout section for more details.
max8556/max8557 4a ultra-low-input-voltage ldo regulators 8 _______________________________________________________________________________________ applications information output voltage selection the max8556/max8557 feature an adjustable output voltage from 0.5v to 3.4v. set the output voltage using an external resistor-divider from the output to gnd with fb connected to the center tap as shown in figures 1 and 2. choose r3 1k ? for light-load stability. determine r2 using the following equation: where v out is the desired output voltage and v fb is 0.5v. capacitor selection and regulator stability capacitors are required at the max8556/max8557 inputs and outputs for stable operation over the full temperature range and with load currents up to 4a. connect 2 x 10? capacitors between in and gnd and 2 x 10? low equivalent-series-resistance (esr) capac- itors between out and gnd. the input capacitor (c in ) lowers the source impedance of the input supply. if the max8556/max8557s?input is close to the output of the source supply, a smaller input capacitance can be used. otherwise, 2 x 10? ceramic input capacitors are recommended. the output capacitor? (c out ) esr affects output noise and may affect output stability. use output capacitors with an esr of 0.05 ? or less to ensure stability and optimum transient dropout. for good output transient performance, use the following formula to select a minimum output capacitance: c out = i out(max) x 1?/200ma noise, psrr, and transient response the max8556/max8557 are designed to operate with low-dropout voltages and low quiescent currents while still maintaining low noise, good transient response, and high ac rejection (see the typical operating characteristics for a plot of power-supply rejection ratio (psrr) vs. frequency). when operating from noisy sources, improved supply-noise rejection and transient response can be achieved by increasing the values of the input and output bypass capacitors and through passive filtering techniques. the max8556/ max8557 load-transient response graphs (see the typical operating characteristics ) show two compo- nents of the output response: a dc shift from the output impedance due to the load current change, and the transient response. a typical transient overshoot for a step change in the load current from 40ma to 4a is 40mv. use an output capacitance from 20? to 120? to attenuate the overshoot. rrx v v out fb 23 1 =? ? ? ? ? ? ? in 7?1 13 14 15 por por gnd shutdown out fb 1? 12 r1 100k ? r2 2k ? r3 1k ? c1 2 x 10 f c2 2 x 10 f 18 n.c. u2 en enabled v in 1.7v to 3.6v v out 1.5v at 4a max8557 figure 2. max8557 typical application circuit in 7?1 13 14 15 pok pok gnd shutdown out fb 1? 12 r1 100k ? r2 1.4k ? r3 1k ? c1 2 x 10 f c2 2 x 10 f 18 n.c. u1 en enabled v in 1.425v to 3.6v v out 1.2v at 4a max8556 figure 1. max8556 typical application circuit
max8556/max8557 4a ultra-low-input-voltage ldo regulators _______________________________________________________________________________________ 9 thermal considerations in pcb layout how much power the package can dissipate strongly depends on the mounting method of the ic to the pcb and the copper area for cooling. using the jedec test standard, the maximum power dissipation allowed in the package is 2667mw. this data is obtained with +70? ambient temperature and +150? maximum junction temperature. the test board has dimensions of 3in x 3in with four layers of 2oz copper and fr-4 mater- ial with 62mil finished thickness. nine thermal vias are used under the thermal paddle with a diameter of 12mil and 1mil plated copper thickness. top and bottom lay- ers are used to route the traces. two middle layers are solid copper and isolated from the nine thermal vias. more power dissipation can be handled by the pack- age if great attention is given during pcb layout. for example, using the top and bottom copper as a heatsink and connecting the thermal vias to one of the middle layers (gnd) transfers the heat from the pack- age into the board more efficiently, resulting in lower junction temperature at high power dissipation in some max8556/max8557 applications. furthermore, the sol- der mask around the ic area on both top and bottom layers can be removed to radiate the heat directly into the air. the maximum allowable power dissipation in the ic is as follows: where t j(max) is the maximum junction temperature (+150?), t a is the ambient air temperature, jc (1.7?/w for the 16-pin tqfn) is the thermal resistance from the junction to the case, and ca is the thermal resistance from the case to the surrounding air through the pcb, copper traces, and the package materials. ca is directly related to system level variables and can be modified to increase the maximum power dissipa- tion. the tqfn package has an exposed thermal pad on its underside. this pad provides a low thermal resis- tance path for heat transfer into the pcb. this low ther- mally resistive path carries a majority of the heat away from the ic. the pcb is effectively a heatsink for the ic. the exposed paddle should be connected to a large ground plane for proper thermal and electrical perfor- mance. the minimum size of the ground plane is dependent upon many system variables. to create an efficient path, the exposed paddle should be soldered to a thermal landing, which is connected to the ground plane by thermal vias. the thermal landing should be at least as large as the exposed paddle and can be made larger depending on the amount of free space from the exposed paddle to the other pin landings. a sample layout is available on the max8556 evalua- tion kit to speed designs. p tt max j max a jc ca ( () ) = ? + ? package type package code document no. 16 tqfn-ep t1655+2 21-0140 chip information transistor count: 3137 process: bicmos package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package draw- ings may show a different suffix character, but the drawing per- tains to the package regardless of rohs status.
max8556/max8557 4a ultra-low-input-voltage ldo regulators maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 10 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2009 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 4/04 initial release 1 8/08 revised pin configuration .1 2 8/09 added automotive version of the max8556. 1
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